Internet Engineering Task Force | S. Gringeri |
Internet-Draft | J. Whittaker |
Intended status: Standards Track | Verizon |
Expires: January 13, 2021 | C. Schmutzer, Ed. |
L. Della Chiesa | |
N. Nainar, Ed. | |
C. Pignataro | |
Cisco Systems, Inc. | |
July 12, 2020 |
Private Line Emulation over Packet Switched Networks
draft-schmutzer-bess-ple-00
This document describes a method for encapsulating high-speed bit-streams as virtual private wire services (VPWS) over packet switched networks (PSN) providing complete signal transport transparency.
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This document describes a method for encapsulating high-speed bit-streams as VPWS over packet switched networks (PSN). This emulation suits applications where complete signal transparency is required and data interpretation of the PE would be counter productive.
One example is two ethernet connected CEs and the need for synchronous ethernet operation between then without the intermediate PEs interfering. Another example is addressing common ethernet control protocol transparency concerns for carrier ethernet services, beyond the behavior definitions of MEF specifications.
The mechanisms described in this document allow the transport of signals from many technologies such as ethernet, fibre channel, SONET/SDH [GR253]/[G.707] and OTN [G.709] by treating them as bit-stream payload defined in Section 3.3.3 of [RFC3985].
The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", "SHOULD", "SHOULD NOT", "RECOMMENDED", "NOT RECOMMENDED", "MAY", and "OPTIONAL" in this document are to be interpreted as described in BCP 14 [RFC2119] [RFC8174] when, and only when, they appear in all capitals, as shown here.
Similarly to [RFC4553] and [RFC5086] the term Interworking Function (IWF) is used to describe the functional block that encapsulates bit streams into PLE packets and in the reverse direction decapsulates PLE packets and reconstructs bit streams.
The generic models defined in [RFC4664] are applicable to PLE.
PLE embraces the minimum intervention principle outlined in section 3.3.5 of [RFC3985] whereas the data is flowing through the PLE encapsulation layer as received without modifications.
For some applications the NSP function is responsible for performing operations on the native data received from the CE. Examples are terminating FEC in case of 100GE or terminating the OTUk layer for OTN. After the NSP the IWF is generating the payload of the VPWS which carried via a PSN tunnel.
|<--- p2p L2VPN service -->| | | | |<-PSN tunnel->| | v v v v +---------+ +---------+ | PE1 |==============| PE2 | +---+-----+ +-----+---+ +-----+ | N | | | | N | +-----+ | CE1 |-----| S | IWF |.....VPWS.....| IWF | S |-----| CE2 | +-----+ ^ | P | | | | P | ^ +-----+ | +---+-----+ +-----+---+ | CE1 physical ^ ^ CE2 physical interface | | interface |<--- emulated service --->| | | attachment attachment circuit circuit
Figure 1: PLE Reference Model
To allow the clock of the transported signal to be carried across the PLE domain in a transparent way the network synchronization reference model and deployment scenario outlined in section 4.3.2 of [RFC4197] is applicable.
J | G v | +-----+ +-----+ v +-----+ |- - -|=================|- - -| +-----+ | |<---------|.............................|<---------| | | CE1 | | PE1 | VPWS | PE2 | | CE2 | | |--------->|.............................|--------->| | +-----+ |- - -|=================|- - -| +-----+ ^ +-----+<-------+------->+-----+ | | ^ A +-+ | |I| E +-+
Figure 2: Relative Network Scenario Timing
The attachment circuit clock E is generated by PE2 in reference to a common clock I. For this to work the difference between clock I and A MUST be explicitly transferred between the PE1 and PE2 using the timestamp inside the RTP header.
For the reverse direction PE1 does generate the clock J in reference to clock I and the clock difference between I and G.
The basic packet format used by PLE is shown in the below figure.
+-------------------------------+ -+ | PSN and VPWS Demux | \ | (MPLS/SRv6) | > PSN and VPWS | | / Demux Headers +-------------------------------+ -+ | PLE Control Word | \ +-------------------------------+ > PLE Header | RTP Header | / +-------------------------------+ --+ | Bit Stream | \ | Payload | > Payload | | / +-------------------------------+ --+
Figure 3: PLE Encapsulation Layer
This document does not imply any specific technology to be used for implementing the VPWS demultiplexing and PSN layers.
When a MPLS PSN layer is used. A VPWS label provides the demultiplexing mechanism as described in section 5.4.2 of [RFC3985]. The PSN tunnel can be a simple best path Label Switched Path (LSP) established using LDP [RFC5036] or Segment Routing [RFC8402] or a traffic engineered LSP established using RSVP-TE [RFC3209] or SR-TE [SRPOLICY].
When PLE is applied to a SRv6 based PSN, the mechanisms defined in [RFC8402] and the End.DX2 endpoint behavior defined in [SRV6NETPROG] do apply.
The PLE header MUST contain the PLE control word (4 bytes) and MUST include a fixed size RTP header [RFC3550]. The RTP header MUST immediately follow the PLE control word.
The format of the PLE control word is inline with the guidance in [RFC4385] and as shown in the below figure:
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |0 0 0 0|L|R|RSV|FRG| LEN | Sequence number | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
Figure 4: PLE Control Word
The first nibble is used to differentiate if it is a control word or Associated Channel Header (ACH). The first nibble MUST be set to 0000b to indicate that this header is a control word as defined in section 3 of [RFC4385].
The other fields in the control word are used as defined below:
L
R
RSV
FRG
LEN
Sequence Number
The RTP header MUST be included and is used for explicit transfer of timing information. The RTP header is purely a formal reuse and RTP mechanisms, such as header extensions, contributing source (CSRC) list, padding, RTP Control Protocol (RTCP), RTP header compression, Secure Realtime Transport Protocol (SRTP), etc., are not applicable to PLE VPWS.
The format of the RTP header is as shown in the below figure:
0 1 2 3 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ |V=2|P|X| CC |M| PT | Sequence Number | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Timestamp | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+ | Synchronization Source (SSRC) Identifier | +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
Figure 5: RTP Header
V: Version
P: Padding
X: Header Extension
CC: CSRC Count
M: Marker
PT: Payload Type
Sequence Number
Timestamp
SSRC: Synchronization Source
A bit-stream is mapped into a packet with a fixed payload size ignoring any structure being present. The number of bytes MUST be defined during VPWS setup, MUST be the same in both directions of the VPWS and MUST remain unchanged for the lifetime of the VPWS.
All PLE implementations MUST be capable of supporting the default payload size of 480 bytes.
For PCS based CE interface types supporting FEC the NSP function MUST terminate the FEC and pass the PCS encoded signal to the IWF function.
For PCS based CE interface types supporting virtual lanes (i.e. 100GE) a PLE payload MUST carry information from all virtual lanes in a bit interleaved manner after the NSP function has performed PCS layer de-skew and re-ordering.
A PLE implementation MUST support the transport of all service types except ODUk bit-streams using the constant bit rate payload.
In case of OTN PLE does only transport the ODUk layer to be bandwidth efficient. This means the OTUk layer which does include the FEC is terminated by NSP function. As OTN is performing frame alignment at the OTUk layer the bit-stream must be carried frame aligned.
A ODUk frame consists of 3824 columns and 4 rows which results in a frame size of 15296 bytes. As common PSN MTU sizes are in the range of at most 9200 bytes the ODUk frame has to be fragmented during PLE payload encapsulation. The used payload size has to be a integer fraction of the full 15296 bytes to allow for ODUk frame alignment. All PLE implementations MUST support the payload size of 478 bytes.
The two FRG bits in the PLE control word MUST be used to indicate first, intermediate, and last fragment of the encapsulated ODUk frame as described in section 4.1 of [RFC4623].
All PLE implementations MUST support the transport ODUk bit-streams using the frame aligned payload.
A PLE VPWS can be established using manual configuration or leveraging mechanisms of a signalling protocol
Furthermore emulation of bit-stream signals using PLE is only possible when the two attachment circuits of the VPWS are of the same type (OC192, 10GBASE-R, ODU2, etc) and are using the same PLE payload type and payload size. This can be ensured via manual configuration or via a signalling protocol
Extensions to the PWE3 [RFC4447] and EVPN-VPWS [RFC8214] control protocols are described in a separate document [PLESIG].
After the VPWS is set up, the PSN-bound IWF does perform the following steps:
The CE-bound IWF is responsible for removing the PSN and VPWS demultiplexing headers, PLE control word and RTP header from the received packet stream and play-out of the bit-stream to the local attachment circuit.
A de-jitter buffer MUST be implemented where the PLE packets are stored upon arrival. The size of this buffer SHOULD be locally configurable to allow accommodation of specific PSN packet delay variation expected.
The CE-bound IWF SHOULD use the sequence number in the control word to detect lost packets. It MAY use the sequence number in the RTP header for the same purposes.
The payload of a lost packet MUST be replaced with equivalent amount of replacement data. The contents of the replacement data MAY be locally configurable. All PLE implementations MUST support generation of "0xAA" as replacement data. The alternating sequence of 0s and 1s of the "0xAA" pattern does ensure clock synchronization is maintained.
Whenever the VPWS is not operationally up, the CE-bound NSP function MUST inject the appropriate native downstream fault indication signal (for example ODUk-AIS or ethernet LF).
Whenever a VPWS comes up, the CE-bound IWF will start receiving PLE packets and will store them in the jitter buffer. The CE-bound NSP function will continue to inject the appropriate native downstream fault indication signal until a pre-configured amount of payloads is stored in the jitter buffer.
After the pre-configured amount of payload is present in the jitter buffer the CE-bound IWF transitions to the normal operation state and the content of the jitter buffer is played out to the CE in accordance with the required clock. In this state the CE-bound IWF does perform egress clock recovery.
Whenever the L bit is set in the PLE control word of a received PLE packet the CE-bound NSP function SHOULD inject the appropriate native downstream fault indication signal instead of playing out the payload.
If the CE-bound IWF detects loss of a pre-configured number of consecutive packets, the de-jitter buffer under- or over-runs, it enters packet loss (PLOS) state . While in this state CE-bound NSP function SHOULD inject the appropriate native downstream fault indication signal. Also the PSN-bound IWF SHOULD set the R bit in the PLE control word of every packet transmitted.
The CE-bound IWF exits the packet loss state after a pre-configured amount of valid PLE packets have been received.
Whenever the R bit is set in the PLE control word of a received PLE packet the PLE performance monitoring statistics SHOULD get updated.
PLE SHOULD provide the following functions to monitor the network performance to be inline with expectations of transport network operators.
The near-end performance monitors defined for PLE are as follows:
Each second that contains at least one lost packet defect SHALL be counted as ES-PLE. Each second that contains a PLOS defect SHALL be counted as SES-PLE.
UAS-PLE SHALL be counted after configurable number of consecutive SES-PLE have been observed, and no longer counted after a configurable number of consecutive seconds without SES-PLE have been observed. Default value for each is 10 seconds.
Once unavailability is detected, ES and SES counts SHALL be inhibited up to the point where the unavailability was started. Once unavailability is removed, ES and SES that occurred along the clearing period SHALL be added to the ES and SES counts.
A PLE far-end performance monitor is providing insight into the CE-bound IWF at the far end of the PSN. The statistics are based on the PLE-RDI indication carried in the PLE control word via the R bit.
The PLE VPWS performance monitors are derived from the definitions in accordance with [G.826]
The PSN carrying PLE VPWS may be subject to congestion, but PLE VPWS representing constant bit-rate (CBR) flows cannot respond to congestion in a TCP-friendly manner as described in [RFC2913].
Hence the PSN providing connectivity for the PLE VPWS between PE devices MUST be Diffserv [RFC2475] enabled and MUST provide a per domain behavior [RFC3086] that guarantees low jitter and low loss.
To achieve the desired per domain behavior PLE VPWS SHOULD be carried over traffic-engineering paths through the PSN with bandwidth reservation and admission control applied.
As PLE is leveraging VPWS as transport mechanism the security considerations described in [RFC7432] and [RFC3985] are applicable.
Applicable signalling extensions are out of the scope of this document.
PLE does not introduce additional requirements from IANA.
To be updated.