Carrying SID Algorithm information in PCE-based Networks.
draft-tokar-pce-sid-algo-01

Abstract

The Algorithm associated with a prefix Segment-ID (SID) defines the path computation Algorithm used by Interior Gateway Protocols (IGPs). This information is available to controllers such as the Path Computation Element (PCE) via topology learning. This document proposes an approach for informing headend routers regarding the Algorithm associated with each prefix SID used in PCE-computed paths, as well as signalling a specific SID algorithm as a constraint to the PCE.

Requirements Language

The key words "MUST", "MUST NOT", "REQUIRED", "SHALL", "SHALL NOT", "SHOULD", "SHOULD NOT", "RECOMMENDED", "MAY", and "OPTIONAL" in this document are to be interpreted as described in [RFC2119].

Status of This Memo

This Internet-Draft is submitted in full conformance with the provisions of BCP 78 and BCP 79.

Internet-Drafts are working documents of the Internet Engineering Task Force (IETF). Note that other groups may also distribute working documents as Internet-Drafts. The list of current Internet-Drafts is at https://datatracker.ietf.org/drafts/current/.

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This Internet-Draft will expire on July 3, 2020.

Copyright Notice

Copyright (c) 2019 IETF Trust and the persons identified as the document authors. All rights reserved.

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Table of Contents

• 1. Introduction
• 2. Terminology
• 3. Object Formats
• 3.1. SR ERO Subobject
• 3.2. LSPA Object
• 4. Operation
• 4.1. SR-ERO NAI Encoding
• 4.2. SID Algorithm Constraint
• 5. Security Considerations
• 6. IANA Considerations
• 6.1. PCEP SR-ERO NAI Types
• 6.2. PCEP TLV Types
• 7. Normative References
• Authors' Addresses

1. Introduction

A PCE can compute SR-TE paths using prefix SIDs with different Algorithms depending on the use-case, constraints, etc. While this information is available on the PCE, there is no method of conveying this information to the headend router.

Similarly, the headend can also compute SR-TE paths using different Algorithms, and this information also needs to be conveyed to the PCE for collection or troubleshooting purposes. In addition, in the case of multiple (redundant) PCEs, when the headend receives a path from the primary PCE, it needs to be able to report the complete path information - including the Algorithm - to the backup PCE so that in HA scenarios, the backup PCE can verify the prefix SIDs appropriately.

An operator may also want to constrain the path computed by the PCE to a specific SID Algorithm, for example, in order to only use SID Algorithms for a low-latency path. A new TLV is introduced for this purpose.

Refer to [RFC8665] and [RFC8667] for details about the prefix SID Algorithm.

This document introduces two new NAI types for the SR-ERO subobject, which is defined in [RFC8664]. A new TLV for signalling SID Algorithm constraint to the PCE is also introduced, to be carried inside the LSPA object, which is defined in [RFC5440].

2. Terminology

The following terminologies are used in this document:

ERO:

Explicit Route Object

IGP:

Interior Gateway Protocol

NAI:

Node or Adjacency Identifier.

PCE:

Path Computation Element

PCEP:

Path Computation Element Protocol.

SID:

Segment Identifier.

SR:

Segment Routing.

SR-TE:

Segment Routing Traffic Engineering.

LSP:

Label Switched Path.

LSPA:

Label Switched Path Attributes.

3. Object Formats

3.1. SR ERO Subobject

The SR-ERO subobject encoding is extended with additional NAI types.

The following new NAI types (NT) are defined:

• NT=TBD1: The NAI is an IPv4 node ID with Algorithm.
• NT=TBD2: The NAI is an IPv6 node ID with Algorithm.

     0                   1                   2                   3
     0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
    +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
    |                      Node IPv4 address                        |
    +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
    |                  Reserved                     |  Algorithm    | 
    +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
                

Figure 1: NAI for IPv4 Node SID with Algorithm

   0                   1                   2                   3
   0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  //               Node IPv6 address (16 octets)                 //
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |                  Reserved                     |  Algorithm    | 
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
                

Figure 2: NAI for IPv6 Node SID with Algorithm

This document defines the following NAIs:

'IPv4 Node ID with Algorithm'

is specified as an IPv4 address and Algorithm identifier. In this case, the NT value is TBD1 and the NAI field length is 8 octets.

'IPv6 Node ID with Algorithm'

is specified as an IPv6 address and Algorithm identifier. In this case, the NT value is TBD2 and the NAI field length is 20 octets.

3.2. LSPA Object

A new TLV for the LSPA Object with TLV type=TBD3 is introduced to carry the SID Algorithm constraint.

The format of the SID Algorithm TLV is as follows:

   0                   1                   2                   3
   0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1 2 3 4 5 6 7 8 9 0 1
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |         Type=TBD3             |            Length=4           |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
  |         Reserved              |   Flags   |L|F|   Algorithm   |
  +-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+-+
          

Figure 3: SID Algorithm TLV Format

The code point for the TLV type is TBD3. The TLV length is 4 octets.

The 32-bit value is formatted as follows.

Reserved:

MUST be set to zero by the sender and MUST be ignored by the receiver.

Flags:

This document defines the following flag bits. The other bits MUST be set to zero by the sender and MUST be ignored by the receiver.

• F (Fallback): If set to 1 and the PCE is unable to compute a path using only prefix SIDs with the specified Algorithm, the PCE MAY compute an alternate fallback path without constraining to the specified Algorithm.
• L (Loose): If set to 1, the PCE MAY insert prefix SIDs with a different Algorithm, but it MUST prefer the specified Algorithm whenever possible.

Algorithm:

SID Algorithm the PCE MUST take into acount while computing a path for the LSP.

4. Operation

4.1. SR-ERO NAI Encoding

IPv4 prefix SIDs used by SR-TE paths with an associated Algorithm SHOULD be encoded with 'IPv4 Node ID with Algorithm' NAI.

IPv6 prefix SIDs used by SR-TE paths with an associated Algorithm SHOULD be encoded with 'IPv6 Node ID with Algorithm' NAI.

4.2. SID Algorithm Constraint

In order to signal a specific SID Algorithm constraint to the PCE, the headend MUST encode the SID ALGORITHM TLV inside the LSPA object.

When the PCE receives a SID Algorithm constraint, it MUST only take prefix SIDs with the specified Algorithm into account during path computation. However, if the L flag is set in the SID Algorithm TLV, the PCE MAY insert prefix SIDs with a different Algorithm in order to successfully compute a path.

If the PCE is unable to find a path with the given SID Algorithm constraint, it MUST bring the LSP down. Alternatively, if the F flag is set in the SID Algorithm TLV, the PCE MAY attempt to compute a path without taking the Algorithm constraint into account at all.

5. Security Considerations

No additional security measure is required.

6. IANA Considerations

6.1. PCEP SR-ERO NAI Types

IANA is requested to allocate new SR-ERO NAI types for the new NAI types specified in this document.

6.2. PCEP TLV Types

IANA is requested to allocate a new TLV type for the new LSPA TLV specified in this document.

7. Normative References

Authors' Addresses